In the present embodiment, information bits together with CRC parity bits obtained after the process 301 as shown in FIG. 6(a) will be further subject to the process of bit permutation 310 in which information bits together with CRC parity bits as shown in FIG. 6(a) will be performed bit permutation by using different bit permutation patterns according to different repetition levels. FIG. 6(b) further shows an exemplary case of after bit permutation 310 when there are for example three repetition levels, i.e. repetition level 1, repetition level 2 and repetition level 3. As shown in FIG. 6(b), for different repetition levels, the position of CRC parity bits as a whole is different after bit permutation 310. Subsequently, bit sequences obtained after the process of bit permutation 310 will be further subject to the process 302?305 and finally mapped onto subframes for transmission.

It is noted that, the bit permutation 310 is not limited to position adjustment of only CRC parity bits as a whole as shown in FIG. 6(b); rather, positions of any bits of information bits and CRC parity bits can be adjusted to form different bit permutation patterns according to different repetition levels.