BRIEF DESCRIPTION OF THE SEVERAL DRAWINGS
FIG. 1 is a cross-sectional view of a semiconductor structure containing a tungsten silicon layer deposited on a substrate, according to an embodiment of the invention;
FIG. 2 is a cross-sectional view the semiconductor structure following introduction of nitrogen into the tungsten silicon layer, according to an embodiment of the invention;
FIG. 3 is a cross-sectional view of the semiconductor structure following deposition of an insulator and creation of damascene voids, according to an embodiment of the invention;
FIG. 4 is a cross-sectional view of the semiconductor structure following formation of conductive contacts in the damascene voids, according to an embodiment of the invention; and
FIG. 5 is a cross-sectional view of an alternative semiconductor structure, according to an embodiment of the invention.
Elements of the figures are not necessarily to scale and are not intended to portray specific parameters of the invention. For clarity and ease of illustration, dimensions of elements may be exaggerated. The detailed description should be consulted for accurate dimensions. The drawings are intended to depict only typical embodiments of the invention, and therefore should not be considered as limiting the scope of the invention. In the drawings, like numbering represents like elements.
DETAILED DESCRIPTION
