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Field-stop reverse conducting insulated gate bipolar transistor and manufacturing method therefor

專利號(hào)
US10096699B2
公開日期
2018-10-09
申請(qǐng)人
CSMC TECHNOLOGIES FAB1 CO., LTD.(CN)
發(fā)明人
Shuo Zhang; Qiang Rui; Genyi Wang; Xiaoshe Deng
IPC分類
H01L29/73; H01L21/02; H01L29/739; H01L29/66; H01L29/06; H01L29/08; H01L21/265; H01L21/28; H01L21/285; H01L21/311; H01L21/324; H01L29/40; H01L29/417; H01L29/423; H01L29/49
技術(shù)領(lǐng)域
layer,gate,stop,bipolar,insulated,oxide,side,structure,emitter,transistor
地域: Jiangsu

摘要

A field-stop reverse conducting insulated gate bipolar transistor and a manufacturing method therefor. The transistor comprises a terminal structure (200) and an active region (100). An underlayment of the field-stop reverse conducting insulated gate bipolar transistor is an N-type underlayment, the back surface of the underlayment is provided with an N-type electric field stop layer (1), one surface of the electric field stop layer departing from the underlayment is provided with a back-surface P-type structure (10), and the surface of the back-surface P-type structure is provided with a back-surface metal layer (12). A plurality of notches (11) which penetrate through the back-surface P-type structure (10) from the back-surface metal layer (12) to the electric field stop layer (1) are formed in the active region (100), and metals of the back-surface metal layer (12) are filled into the notches (11) to form a metal structure which extends into the electric field stop layer (1).

說明書

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

S340, performing a second phrase front side process.

FIG. 4J shows a cross-section view of the field stop reverse conducting insulated gate bipolar transistor after the step S340 is performed. The second phrase front side process specifically comprises photoetching and etching the oxide dielectric layer 7, forming a contact hole by having a part of the P well 5 and the emitter 6 exposing, filling an emitter metal structure 8 in the contact hole, then forming a passivation layer 9. The silicon oxide layer and the emitter metal structure 8 is covered by the passivation layer 9. The function of the passivation layer 9 is to prevent the surface of the chip from contaminating of the external ions. In the embodiment, the material of the passivation layer 9 is SiN.

S350, forming a plurality of notches in the active region through the back side P-type structure into the field stop layer, wherein the back side metal layer is filled in the plurality of notches.

Referring to FIG. 4K, forming a plurality of notches 11, wherein the back side metal layer is filled in the plurality of notches to form a metal structure extending in the field stop layer, as shown in FIG. 2. In the embodiment, the back side metal layer 12 employs an Al—Ti—Ni—Ag structure.

權(quán)利要求

1
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