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Enhanced substrate contact for MOS transistor in an SOI substrate, in particular an FDSOI substrate

專利號(hào)
US10096708B2
公開日期
2018-10-09
申請(qǐng)人
STMicroelectronics SA(FR Montrouge)
發(fā)明人
Sotirios Athanasiou; Philippe Galy
IPC分類
H01L29/78; H01L27/12; H01L23/528; H01L21/84; H01L29/66; H01L21/74; H01L29/786
技術(shù)領(lǐng)域
forked,transistor,substrate,gate,region,raised,drain,tr,contact,mos
地域: Montrouge

摘要

An integrated electronic device includes a semiconductive film above a buried insulating layer that is situated above a supporting substrate. An active zone is delimited within the semiconductive film. A MOS transistor supported within the active zone includes a gate region situated above the active zone. The gate region includes a rectilinear part situated between source and drain regions. The gate region further includes a forked part extending from the rectilinear part. A raised semiconductive region situated above the active zone is positioned at least partly between portions of the forked part. A substrate contact for the transistor is electrically coupled to the raised semiconductive region.

說明書

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The substrate contact is electrically coupled to the first raised semiconductive region in as much as it can for example be directly formed on the raised semiconductive region, or possibly on the gate region if the forked part of the gate region is in electrical contact with the raised semiconductive region.

In other words, the production of a junction-free transistor is dispensed with by producing a contact electrically coupled to the raised silicon region. The forked part of the gate notably serves as mask which makes it possible to simplify the delimiting and the production of the raised silicon region.

The distance between the contact and the substrate is reduced, which makes it possible on the one hand to reduce the spurious capacitive effects between these elements and, on the other hand, to reduce the substrate access resistance.

According to one implementation, the formation of said gate region further comprises a formation of a second forked part extending said rectilinear part opposite the first forked part, the method further comprising: formation of a second raised semiconductive region above the active zone and at least partly within said second forked part, and formation of a second substrate contact for the first transistor electrically coupled to, for example on, said second raised semiconductive region.

The formation of each raised semiconductive region can comprise an epitaxy of a semiconductive material.

According to one implementation, the formation of at least one substrate contact is performed on the corresponding raised semiconductive region.

As a variant, at least one raised semiconductive region is in contact with at least one forked part of the gate region and the formation of at least one substrate contact is performed on said gate region.

權(quán)利要求

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