The device DIS comprises a substrate of fully depleted silicon on insulator (FDSOI) type (FDSOI being an acronym well known to those skilled in the art), which comprises a semiconductive film 1 situated above a buried insulating layer 2 (“BOX”, Buried Oxide), which is itself situated above a supporting substrate comprising a semiconductive well 3.

The well is here of P type and comprises an upper zone 30 (in contact with the BOX) of P+ type which forms a rear buried gate making it possible to bias the channel of a transistor TR via the rear face. In this respect, the device DIS further comprises a back gate contact BG making it possible to bias the well 3.

An insulating region 4, of shallow trench insulation (STI) type delimits an active zone ZA in the semiconductive film 1.

The semiconductive film 1 comprises a fully depleted semiconductive material which in practice is an intrinsic material, for example intrinsic silicon of P type, that is to say very weakly doped (10¹⁵ atoms·cm^?3).

An MOS transistor TR, for example an NMOS transistor, is produced in and on the active zone ZA.

This transistor TR comprises source S and drain D semiconductive regions, doped of N+ type, an insulated gate region G and a channel region 8 adapted to be formed under the gate.

The insulated gate region G comprises a rectilinear part G1 produced above the channel region 8, and a forked part G2 having an extension G20 extending at right angles on either side of the gate line G1.