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Enhanced substrate contact for MOS transistor in an SOI substrate, in particular an FDSOI substrate

專利號
US10096708B2
公開日期
2018-10-09
申請人
STMicroelectronics SA(FR Montrouge)
發(fā)明人
Sotirios Athanasiou; Philippe Galy
IPC分類
H01L29/78; H01L27/12; H01L23/528; H01L21/84; H01L29/66; H01L21/74; H01L29/786
技術(shù)領(lǐng)域
forked,transistor,substrate,gate,region,raised,drain,tr,contact,mos
地域: Montrouge

摘要

An integrated electronic device includes a semiconductive film above a buried insulating layer that is situated above a supporting substrate. An active zone is delimited within the semiconductive film. A MOS transistor supported within the active zone includes a gate region situated above the active zone. The gate region includes a rectilinear part situated between source and drain regions. The gate region further includes a forked part extending from the rectilinear part. A raised semiconductive region situated above the active zone is positioned at least partly between portions of the forked part. A substrate contact for the transistor is electrically coupled to the raised semiconductive region.

說明書

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The forked part G2 further comprises a first branch G21 and a second branch G22 extending from the extension G20 in the extension of the source S and drain D regions.

The reference B denotes the substrate of the transistor TR.

According to a conventional embodiment in substrates of FDSOI type, the drain D and source S regions are produced in a raised fashion by epitaxial rework (i.e., growth), in order to allow for the contacts.

The semiconductive film further comprises a doped region of P+ type on which has been produced a raised silicon region 5 by epitaxial rework. The biasing of this region makes it possible to bias the substrate 1 of the transistor TR.

This raised region 5, here of P type, is produced between the first branch G21 and the second branch G22.

Here, the first branch G21 and the second branch G22 allow for a greater accuracy in the production of the region 5 because they delimit the epitaxied region.

Zones of metal silicide are, in this example, produced respectively on the gate G, drain D and source S regions, and on the region 5, and respectively allow for the gate PCG, drain PCD, source PCS and substrate PCB contacts.

The gate contacts are here produced on the branches G21 and G22 of the forked part G2 of the gate region G, via the metal silicide zone.

權(quán)利要求

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