The semiconductor circuit illustrated in FIG. 30B has a configuration of an analog switch circuit in which the p-channel transistor 281 and the n-channel transistor 282 are connected to each other in parallel.
The semiconductor circuit illustrated in FIG. 30C has a configuration of a NAND circuit including a transistor 281a, a transistor 281b, a transistor 282a, and a transistor 282b. A potential output from the NAND circuit depends on the combination of potentials input to an input terminal IN_A and an input terminal IN_B.
<Examples of Memory Element>
The semiconductor circuit illustrated in FIG. 31A has a configuration of a memory element 251a in which one of a source and a drain of a transistor 262 is connected to a gate of a transistor 263 and one electrode of a capacitor 258. The circuit illustrated in FIG. 31B has a configuration of a memory element 261a in which one of the source and the drain of the transistor 262 is connected to one electrode of the capacitor 258.
The memory element 251a and the memory element 261a can each store charge injected through a wiring 254 and the transistor 262 at a node 257. The transistor 262 is an OS transistor, which enables charge to be stored at the node 257 for a long period.
