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Transistor, semiconductor device, and electronic device

專利號
US10096720B2
公開日期
2018-10-09
申請人
Semiconductor Energy Laboratory Co., Ltd.（JP Atsugi-shi, Kanagawa-ken）
發(fā)明人
Yoshinori Ando
IPC分類
H01L27/12; H01L29/786; H01L29/66
技術(shù)領(lǐng)域
layer,transistor,insulating,electrode,in,109_1b,oxide,be,or,wiring
地域： Atsugi-shi, Kanagawa-ken

摘要

To provide a semiconductor device with high design flexibility. A first transistor and a second transistor having different electrical characteristics from those of the first transistor are provided over the same layer without significantly increasing the number of manufacturing steps. A semiconductor layer where a channel of the first transistor is formed and a semiconductor layer where a channel of the second transistor is formed are formed using semiconductor materials having different electron affinities. When an oxide semiconductor is used for the semiconductor layer, an insulating layer containing excess oxygen is used as an insulating layer below the semiconductor layer. By increasing the thickness of the insulating layer, a large amount of oxygen can be supplied to the semiconductor layer.

說明書

With the above deposition apparatus, entry of impurities into the oxide semiconductor can be suppressed. Furthermore, when a film in contact with the oxide semiconductor is formed with the use of the above deposition apparatus, the entry of impurities into the oxide semiconductor from the film in contact therewith can be suppressed.

This embodiment can be implemented in an appropriate combination with any of the structures described in the other embodiments and the like.

This application is based on Japanese Patent Application serial no. 2016-061869 filed with Japan Patent Office on Mar. 25, 2016, the entire contents of which are hereby incorporated by reference.

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