FIG. 4 is a flowchart 40 of exemplary steps for fabricating a device (e.g., field-effect transistor (FET), photodetector, etc.) utilizing nanocrystal-based thin films and ligand exchange methods as described in flowchart 10 or flowchart 20 along with optional doping by evaporation and thermal diffusion to control carrier type and concentration on the device. The NCs may be cadmium based (e.g., CdS, CdSe, CdTe), zinc based (e.g., ZnS, ZnSe, ZnTe), nickel based (e.g., NiFe), gold based, silver based, bismuth based, lead based (e.g., PbS, PbSe, PbTe). Other suitable NC compositions, alloys and core/shells will be understood by one of skill in the art from the description herein. All steps of flowchart 40 may be performed in a nitrogen atmosphere.

At block 400, a substrate is optionally prepared prior to the deposition of NCs. The substrate may be flexible (e.g., polyimide, parylene, etc.), or substantially non-flexible (e.g., SiO2, Si, and/or Al2O3). In one embodiment, electrodes are optionally deposited on the substrate prior to deposition of the NCs. The electrodes may be Al, In, Ga, Pb, Se, Au, Ag, etc. Other suitable materials for use as electrodes will be understood by one of skill in the art. In a particular embodiment, a metal is blanket deposited on the substrate. The metal may be In, Ga, Pb, Se, Au, Ag, etc. Other suitable materials for blanket deposition will be understood by one of skill in the art. In an alternative embodiment, the metal may be patterned using shadow masks or photolithography. Lateral electrodes may be patterned on the substrate in embodiments where the device to be fabricated is a photodetector. A gate dielectric layer may be formed on the substrate in embodiments where the device to be fabricated is a FET. In one embodiment, the gate dielectric layer may be formed above electrodes deposited on the substrate.