At block 230 of FIG. 2, a first dielectric layer may be formed over the semiconductor substrate 100. Referring to FIGS. 4A and 4B, a first dielectric layer 401 may be formed over the semiconductor substrate 100, and the first dielectric layer 401 may have a top surface lower than a top surface of the semiconductor structure 100 so as to expose sidewalls of the semiconductor structure 301 above the first dielectric layer 401. The thickness of the first dielectric layer 401 may be in a range from about 5 nm to about 200 nm, for example, may be in a range from about 50 nm to about 100 nm. The first dielectric layer 401 may include tetraethyl orthosilicate (TEOS), silicon nitride (Si₃N₄), silicon oxide (SiO₂), silicon oxynitride (SiON), nanoporous silica, hydrogensilsesquioxanes (HSQ), Teflon-AF (polytetrafluorethylene or PTFE), silicon oxyfluoride (FSG), carbon doped SiO₂ (SiCO), hydrogenated silicon oxycarbide (SiCOH), or other low k dielectric materials. The preferable material for the first dielectric layer 401 is SiO₂. The first dielectric layer 401 may be formed on the semiconductor substrate 100 with various deposition processes include, but are not limited to: physical vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD), and spin coating. The preferable method is PVD, such as sputtering, or CVD.