The driving circuit 15 includes an output terminal to output driving signals. The third resistor is electrically connected between the output terminal of the driving circuit 15 and the base of the pnp type BJT Q2.

Power of the driving signals output by the driving circuit 15 may be amplified to be output to the gate of the MOSFET 12 to clearly control the MOSFET 12. In this embodiment, the driving signals may be Pulse Width Modulation (PWM) signals.

With reference to FIG. 6, in a fifth embodiment of the present invention, the converter may be a forward converter, and the clamping winding We and the primary winding Wp are in phase.

The converter may further include a first output diode Dout1, a second output diode Dout2, an output capacitor Cout, and an output inductor Lout.

An anode of the first output diode Dout1 is electrically connected to one terminal of the secondary winding Ws. An anode of the second output diode Dout 2 is electrically connected to the other terminal of the secondary winding Ws, and a cathode of the second output diode Dout 2 is electrically connected to a cathode of the first output diode Dout1.

The output capacitor is electrically connected between the first output terminal O/P1 and the second output terminals O/P2. The output inductor Lout is electrically connected between the cathode of the first output diode Dout1 and the first output terminal O/P1. In this embodiment, a polarity of the secondary winding Ws is same as a polarity of the primary winding Wp.