When the voltage of the anode of the third diode D3 is smaller than the voltage of the cathode of the third diode D3, the third diode D3 may be reverse biased. Therefore, the voltage of the second node n2 may not be less than the voltage of the third node n3. Namely, when the first capacitor C1 is discharging, the voltage of the second node n2 is maintained at Vsource. The voltage of the second node n2 does not discharge to the voltage of the third node n3.

Further, when the voltage of the anode of the first diode D1 is greater than the voltage of the cathode of the first diode D1, the first diode D1 may be forward biasing. Therefore, the voltage of the second node n2 may not be higher than the voltage provided by the power source 13, such as the voltage of the input terminal I/P. Namely, the first diode D1 keeps the voltage of the first node n1 at most up to the voltage of the input terminal I/P when the first capacitor C1 is charging.

In other words, the LC tank resonates up to Vsource. The third diode D3 keeps the first capacitor C1 from discharging down to Vclamp and the first diode D1 assures that maximum voltage at Vlc is not greater than Vsource.

With reference to FIG. 10, when the switch 12 is turned on for a while, the second capacitor C2 may finish charging the first capacitor C1 through the third diode D3, and the voltage across the first capacitor C1 is approximately equal to Vsource.