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Electric power conversion system

專利號
US10097093B2
公開日期
2018-10-09
申請人
TOYOTA JIDOSHA KABUSHIKI KAISHA（JP Toyota-shi, Aichi-ken）
發(fā)明人
Shohei Sunahara; Hidetsugu Hamada; Akihiko Ide; Masatoshi Shinohara
IPC分類
H02J1/10; H02J3/38; H02M3/158
技術(shù)領(lǐng)域
pwm2,pwm,pwm1,cnv1,cnv2,shift,switching,phase,cnv,step
地域： Toyota-shi, Aichi-ken

摘要

An electric power conversion system includes: a first battery; a second battery; an electric power converter including a plurality of switching elements, and configured to bidirectionally step up or step down electric power between an output line and each the first and second batteries in accordance with PWM signals; and a controller configured to control first and second step-up and step-down circuits by generating first and second PWM signals. The first and second step-up and step-down circuits are established between each first and second batteries and the output line. The first and second PWM signals are signals for controlling step-up and step-down operation of each first and second step-up and step-down circuit. The controller is configured to, when coupling on-duty periods of both the first and second PWM signals with each other, execute an overlap phase shift that partially overlaps the on-duty periods of the first and second PWM signals.

說明書

FIG. 9 shows an example of the overlap phase shift. In this example, for the sake of easy understanding, as an example of a change in duty ratio, the rate of the PWM signal PWM1 is set to 1.0 (constant), and the rate of the PWM signal PWM2 is set to 0.9. The rates are kept over multiple periods, and the on period of the PWM signal PWM2 is reduced once every period accordingly.

If the edge-alignment phase shift is executed each time the on period is reduced in such a case, a switching loss due to an auxiliary pulse arises once every period as shown in FIG. 20, and there is a concern that the advantage of a reduction in loss due to the phase shift is lost.

The CNV controller 13 executes control by advancing the rising edge of the PWM signal PWM2 with respect to the falling edge of the PWM signal PWM1, in short, providing an overlap width, such that, even when the on period of the PWM signal PWM2 is reduced in the following periods, the rising edge of the PWM signal PWM2 does not separate (delay) from the falling edge of the PWM signal PWM1.

權(quán)利要求

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