If H1P equals H1N, the circuit remains balanced, and the injected current has no effect on the input-referred threshold of the latch. In other words, the effective DFE tap weight is zero. More generally, though, the currents H1P and H1N are unequal, so the injected currents imbalance the decision-making slicer circuit 550 and change the input-referred threshold of the latch by D. The change in latch threshold has the opposite polarity (?D) if Q0[0] is high (and QB0[0] is low). In this scenario, a current equal to H1P/3 is steered into the first current injection node 520A while a current equal to H1N/3 is steered into the second current injection node 420B. Similar to FIG. 4, the effective slicing level (threshold) is moved up or down depending on the polarity of the feedback bit. Since the outputs of the three adder circuits 530(0) to 530(2) of the 1st-tap DFE (H1) feedback circuit 560 all converge together (i.e., at the first and second current injection nodes 520A and 520B, respectively), their injected currents are added together. The net effect on the latch threshold is proportional to the level of the previous PAM4 symbol. Since the effective DFE tap weight is proportional to the difference H1P?H1N, both the magnitude and polarity of the H1 tap weight can be set by adjusting the values of the H1P and H1N current sources (e.g., via current digital to analog converters (DACs)). Other advantages of the fully balanced and differential tap structure of FIG. 5A is that capacitive feedthrough from gate-to-drain (e.g., from Q0[0] and QB0[0] to the first and second current injection nodes 520A and 520B) is cancelled to first-order, and the loading of the first and second current injection nodes 520A and 520B is inherently balanced.
