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Image sensor and method for improving readout speed

專利號
US10097778B2
公開日期
2018-10-09
申請人
Rayence Co., Ltd.; Vatech Ewoo Holdings Co., Ltd.(KR Gyeonggi-do KR Gyeonggi-do)
發(fā)明人
Jari Pekka Kosonen; Sung Kyn Heo
IPC分類
H04N5/374; H04N5/347; H04N5/378; H04N5/32
技術(shù)領(lǐng)域
binning,sampling,readout,lines,signals,sc1,column,circuits,row,in
地域: Gyeonggi-do

摘要

The present invention provides an image sensor comprising: pixels arranged along a plurality of row lines and column lines in a matrix form; a scan driving unit for selecting the row lines in the unit of n lines in a binning mode; and a read circuit unit for outputting n*m binning signals generated by sampling n*1 signals output in every column line according to the selection of the row lines and averaging the sampled n*1 signals in the unit of m neighboring column lines, wherein each of n and m is a natural number larger than or equal to 2.

說明書

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Each of the first sampling circuits and the second sampling circuits may include a first switch configured to turn on/off input of the n×1 signal; a capacitor configured to store the n×1 signal and to store the n×m signal when the connecting switch is in a turns on state; and a second switch configured to turn on/off output of n×m signals.

The readout circuit is configured to sequentially output the n×m signals with the m number of column line basis.

According to another aspect of the present invention, there is provided a method of driving an image sensor including a plurality of pixels arranged in a matrix from along a plurality of row lines and column lines, including: selecting the row lines with n number line basis in a binning mode; and sampling n×1 signals from each of the column lines in response to the selection of the row lines, and outputting n×m binning signals by averaging the n×1 signals with a m number of column line basis with a readout circuit wherein n and m are natural numbers of 2 or more.

The method further includes: sampling, by turns, the n×1 signal output from each of the column lines, and outputting, by turns, the n×m binning signals with first sampling circuits and second sampling circuits configured of the readout circuit, wherein the n×m binning signals are formed by connecting m number of the first sampling circuits and the second sampling circuits.

Each of the first sampling circuits and the second sampling circuits includes: a first switch configured to turn on/off input of the n×1 signal; a capacitor configured to store the n×1 signal and to store the n×m signal when the connecting switch is in a turn-on state; and a second switch configured to turn on/off output of n×m signals.

權(quán)利要求

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