FIG. 4 is a schematic block diagram of the wireless device 14 such as, for example, the wireless device 14-2 discussed above according to some embodiments of the present disclosure. As illustrated, the wireless device 14 includes circuitry comprising one or more processors 16 (e.g., Central Processing Units (CPUs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), and/or the like) and memory 18. The wireless device 14 also includes one or more transceivers 20 each including one or more transmitters 22 and one or more receivers 24 coupled to one or more antennas 26. In some embodiments, the functionality of the wireless device 14 described above may be fully or partially implemented in software that is, e.g., stored in the memory 18 and executed by the processor(s) 16.
In some embodiments, a computer program including instructions which, when executed by at least one processor, causes the at least one processor to carry out the functionality of the wireless device 14 according to any of the embodiments described herein is provided. In some embodiments, a carrier containing the aforementioned computer program product is provided. The carrier is one of an electronic signal, an optical signal, a radio signal, or a computer readable storage medium (e.g., a non-transitory computer readable medium such as memory).