Also, the insulation layer 28 is a resin layer such as a phenol resin, a polyimide resin, an epoxy resin and the like and is formed therein with a via hole 28a reaching the wiring 27 by laser processing. On the lower surface 21a-side, a first ground pattern 31 and a first signal line 31a obtained by patterning a copper-plated film having a thickness of about 10 μm to 35 μm in the via 28a and on the insulation layer 28 are formed.

Also, on the upper surface 21b-side, a second ground pattern 32 and a second signal line 32a obtained by patterning a copper-plated film having a thickness of about 10 μm to 35 μm in the via 28a and on the insulation layer 28 are formed.

Solder resist layers 29 are respectively formed on each of the ground patterns 31, 32 and on each of the signal lines 31a, 32a, and surfaces of the solder resist layers 29 become the lower surface 21a and the upper surface 21b. The solder resist layer 29 on the upper surface 21b-side is formed with a via 29a having a depth reaching the second ground pattern 32, and the terminal 23 is joined to the second ground pattern 32 in the via 29a.