The vias include the plurality of outer vias 332 and 342 and the plurality of inner vias 331 and 341 that are formed closer to the center of the substrate 30 than the outer vias 332 and 342. Similar to the outer vias 332 and 342, the inner vias 331 and 341 assist in transferring heat from the first surface 301 to the second surface 302. The inner vias 331 and 341 also function as barriers to limit and/or prevent the radially dissipation of heat via the circuit patterns toward the center of the substrate 30. By controlling the dissipation of heat in such manner, the solderability of components to the substrate 30 can be improved.

The vias 331, 332, 341, and 342 are through hole vias that pierce both the first surface 301 and the second surface 302 and extend through the layers of the substrate 30. The surface resist layer 47 is formed between the vias 331, 332, 341, and 342 and the resist openings 37 and 38 on the first surface 301. In the present embodiment, since the vias 331 and 332 and the power supply terminal connection portion 33 are connected by a circuit pattern, the expansion of the resist opening 37 can be limited and/or prevented by covering the connection circuit pattern with a resist. Similarly, since the vias 341 and 342 and the ground terminal connection portion 34 are connected by a circuit pattern, the expansion of the resist opening 38 can be limited and/or prevented by covering the connection circuit pattern with a resist.