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Systems and methods for memory circuitry in an electronic display

專利號(hào)
US10867548B2
公開日期
2020-12-15
申請(qǐng)人
Apple Inc.（US CA Cupertino）
發(fā)明人
Tien-Chien Kuo; Kanghoon Jeon; Yingkan Lin; Bilin Wang; Ivan Knez; Stanley Bo-Ting Wang; Chun-Yao Huang
IPC分類
G09G3/32; G09G3/36; G09G3/20; G09G3/3275; G09G3/3258
技術(shù)領(lǐng)域
pixel,driver,emission,bit,circuitry,data,sub,row,memory,image
地域： CA CA Cupertino

摘要

An electronic display may include a memory formed in an active area of the electronic display or formed in integrated circuitry of the electronic display that is outside of the active area. The memory may store a digital data signal indicative of a value within a data range. The electronic display may include a driver disposed in the active area, where the driver may generate one or more analog electrical signals in response to the digital data signal. The electronic display may also include a light-modulating device disposed on the active area, where the light-modulating device may emit light based at least in part on the one or more analog electrical signals.

說明書

In a similar fashion as the global anode embodiment, the global cathode sub-pixel 72 may create different gray levels through following a binary pulse width modulation scheme. The binary pulse width modulation scheme may use a bit-plane clock in part to control the control signals outputted from the row driver 60. In this way, the Emit_en signal 420 may be enabled for shorter time periods for bits of lesser significance (e.g., least significant bit of DATA 412) on the perceived gray level and may be enabled for longer time periods for bits of greater significance (e.g., most significant bit of DATA 412) on the perceived gray level. In some embodiments, a Sel signal 415 may be modulated to cause light to emit from the sub-pixel 72 according to different gray levels.

As described in FIG. 9, using memory-in-pixel techniques and a comparator may enable a row driver to create a single pulse width modulation emission scheme. Accordingly, an embodiment of a sub-pixel 72 including a comparator 490, memory circuitry 491, and memory circuitry 492 is shown in FIG. 21. It should be appreciated that the sub-pixel 72 is intended to be illustrative and not limiting. For example, while the memory circuitry 492 is shown as being coupled to LED driver circuitry and to light-emitting circuitry of the sub-pixel 72, the memory circuitry 492 may couple to any suitable light-emitting circuitry and/or driving circuitry.

權(quán)利要求

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