Systems and methods for memory circuitry in an electronic display
摘要
說明書
When sub-pixels 72 are operated to emit light following a binary pulse width modulation emission scheme without reordering, total error counts are high (e.g., 322) as shown in bit-plane graph 580 and error graph 588. It may be desired to lower the total error counts through reordering because errors manifest on an electronic screen of an electronic display 18 as, for example, dynamic false contouring, color breakup, and/or flickering of light emitted from one or more pixel.
As reordering occurs and as the most significant bits are reordered to emit first to cause gray levels of the bit-plane graphs, as seen with bit-plane graph 582 and bit-plane graph 584, the bit-plane pattern trends towards looking like the ideal bit-plane shown in bit-plane graph 586. In addition, error decreases as reordering occurs as shown with error graph 588, error graph 590, error graph 592, and error graph 594. Perceived image quality may improve from decreasing error counts via the reordering of the bit-planes. The ideal case (e.g., bit-plane graph 586) shows how the bit-plane graph 586 trends to a gradual bit-plane change as gray level increases and how the total error trends to a number of total states represented by the bit-plane (e.g., 6 bits corresponds to 64 total states, following the relationship: number of states=2n, where n is the number of bits) through increasing a number of reorderings.
