Systems and methods for memory circuitry in an electronic display
摘要
說明書
At a high level and for the case of ideal reordering, the row driver 60 may operate the memory circuitry 560 to transmit DATA 412 in an order of most significant bit to least significant bit as the CSimage.data signal 247 to cause light emission from the sub-pixel 72, unless a bit of DATA 412 is a logical low. If a DATA 412 bit is a logical low, the row driver 60 effectively operates the memory circuitry 560 to skip the logical low emission period and to emit light according to a next logical high emission period. Upon transmission of all logical high bits represented in DATA 412, the row driver 60 pauses for an equivalent duration to the total emission period of the logical lows, or in some embodiments, proceeds to process new DATA 412 for emission. For example, referring to emission reordering example 600, if DATA 412 equals 1111, CSimage.data signal 247 transmits from memory circuitry 560 as “1111” having the same total emission period as “1111,” while if DATA 412 equals “0011,” transmitted CSimage.data signal 247 from memory circuitry 560 equals “1100” with respective bits having the same emission period as “0011,” and if DATA 412 equals “0100,” the data is recorded into “1000” for transmission as CSimage.data signal 247. Ultimately, a single pulse width of light emission is created from data corresponding to a binary pulse width modulation emission scheme.
