FIG. 1 shows a schematic circuit diagram of a pixel circuit according to an embodiment of the present disclosure. As shown in FIG. 1, the pixel circuit includes a first switching circuit 110, a second switching circuit 120, a reset circuit 130, a light-emitting element 140, a tank circuit 150, and a driving transistor 160.

The first switching circuit 110 is connected to a first scan signal terminal GATE1, a data signal terminal DATA and a first node g, and is configured to supply a data signal on the data signal terminal DATA to the first node in response to a first scan signal on the first scan signal terminal GATE1 being valid.

The second switching circuit 120 is connected to a second scan signal terminal GATE2, a second node s and a sensing signal line SL, and is configured to conductively connect the sensing signal line SL with the second node in response to a second scan signal on the second scan signal terminal GATE2 being valid.

The reset circuit 130 is connected to a reset control terminal C_PRESL, a reset signal terminal V_PRESL, and the sensing signal line SL, and is configured to supply a reset voltage on the reset signal terminal to the sensing signal line SL in response to a reset control signal on the reset control terminal being valid.

A first terminal of the light-emitting element 140 is connected to the second node, and a second terminal of the light-emitting element 140 is connected to a first voltage terminal VSS. In some embodiments, the second terminal of the light-emitting element 140 may be grounded.