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Pixel circuit, compensation method for pixel circuit and display device

專利號
US10867554B2
公開日期
2020-12-15
申請人
Hefei Xinsheng Optoelectronics Technology Co., Ltd.; BOE Technology Group Co., Ltd.（CN Hefei CN Beijing）
發(fā)明人
Min He; Song Meng; Fei Yang; Chun Cao; Xiaolong Wei
IPC分類
G09G3/3233; G09G3/3266; G09G3/3275
技術(shù)領(lǐng)域
voltage,transistor,signal,reset,scan,emitting,terminal,sensing,tft3,switching
地域： Anhui

摘要

The present disclosure relates to a pixel circuit, a compensation method and a display device. The pixel circuit includes a first switching circuit for supplying a data voltage to a first node in response to a first scan signal being valid, a second switching circuit for conductively connecting a sensing signal line with a second node in response to a second scan signal being valid, a reset circuit for supplying a reset voltage to the sensing signal line in response to a reset control signal being valid, a light-emitting element, and a driving transistor for enabling, when the light-emitting element emits light, the sensing signal line to be charged in response to the second scan signal being valid and the reset control signal being invalid, the voltage of the sensing signal line is sensed after it was charged so as to compensate the data voltage.

說明書

A gate of the first switching transistor TFT1 is connected to a first scan signal terminal GATE1, a first electrode of the first switching transistor TFT1 is connected to a data signal terminal DATA, and a second electrode of the first switching transistor TFT1 is connected to a first node. A gate of the second switching transistor TFT2 is connected to a second scan signal terminal GATE2, a first electrode of the second switching transistor TFT2 is connected to a second node, and a second electrode of the second switching transistor TFT2 is connected to a sensing signal line SL. A first terminal of the reset switch Spre_L is connected to a reset signal terminal, and a second terminal of the reset switch Spre_L is connected to the sensing signal line SL. A gate of the driving transistor TFT3 is connected to the first node, a first electrode of the driving transistor TFT3 is connected to a first voltage terminal VDD, and a second electrode of the driving transistor TFT3 is connected to the second node. A first terminal of the energy storage capacitor Cst is connected to the first node, and a second terminal of the energy storage capacitor Cst is connected to the second node. A first terminal of the organic light-emitting diode OLED is connected to the second node, and a second terminal of the OLED is grounded.

To simplify the description, a first level is used to represent a valid level and a second level is used to represent an invalid level hereinafter.

權(quán)利要求

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