In a pixel circuit shown in FIG. 4 provided by the embodiment of the present disclosure, the second electrode of the driving transistor TFT3 is connected to the power supply signal terminal VDD, so that the driving transistor TFT3 may be controlled to generate an operating current in a state where the gate of the driving transistor TFT3 controls the TFT3 to turn on.
Next, the pixel circuit shown in FIG. 4 is taken as an example, and the compensation method for the pixel circuit provided by the embodiment of the present disclosure is illustrated with reference to a timing diagram shown in FIG. 5. Exemplarily, in the following description, it is assumed that the transistors in the circuit are all n-type transistors, and accordingly a valid potential signal may be a high-level signal and an invalid potential signal is a low-level signal.
