Optionally, the first switching circuit further comprises a first switching transistor. A gate of the first switching transistor is connected to the first scan signal terminal, a first electrode of the first switching transistor is connected to the data signal terminal, and a second electrode of the first switching transistor is connected to the gate of the driving transistor. The data writing phase comprises: applying a first level signal on the first scan signal terminal to control the first switching transistor to turn on, and applying the data signal on the data signal terminal so as to input the data signal to the gate of the driving transistor.

Optionally, the second switching circuit further comprises a second switching transistor. A gate of the second switching transistor is connected to the second scan signal terminal, a first electrode of the second switching transistor is connected to the second node, and a second electrode of the second switching transistor is connected to the sensing signal line. The data writing phase comprises: applying a first level signal on the second scan signal terminal to control the second switching transistor to turn on, and applying a reset voltage on the sensing signal line so as to input the reset voltage to the second node.

Optionally, the data writing phase comprises: before inputting the data signal to the gate of the driving transistor, applying the first level signal on the second scan signal terminal to control the second switching transistor to turn on, and applying the reset voltage on the sensing signal line so as to input the reset voltage to the second node.