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Display device and method for driving the same

專利號
US10867559B2
公開日期
2020-12-15
申請人
Samsung Display Co., Ltd.(KR Yongin-si)
發(fā)明人
Jun Hyun Park; Cheol-Gon Lee; Yang-Hwa Choi
IPC分類
G09G3/3266; G09G3/3225; G09G3/3275; G09G3/3233
技術(shù)領(lǐng)域
voltage,transistor,elvdd,elvdd_l,first,node,scan,level,emission,light
地域: Yongin-si

摘要

A display device including: a scan driver that transmits scan signals to scan lines; a data driver that data signals to data lines; and a display portion that includes pixels, respectively connected to the corresponding scan lines and corresponding data lines, and displays an image by the pixels that simultaneously emit light according to the corresponding data signals, wherein each of pixels includes: an organic light emitting diode; a first transistor that includes a gate connected to a first node, and is connected between first power and an anode of the organic light emitting diode; a second transistor that includes a gate connected to a corresponding scan line and transmits the corresponding data signal to the first node; and a first capacitor that is connected to the first node, and stores a data voltage according to the data signal.

說明書

FIG. 3 and FIG. 4 are timing diagrams of an exemplary driving method of a display device including the pixel of FIG. 2. As shown in FIG. 3 and FIG. 4, the display device may operate by a simultaneous light emission method that includes non-light emission periods PA1 to PA3 during which pixels PX do not emit light and a light emission period PA4 during which the pixels PX simultaneously emit light.

The non-light emission period may include an initialization period PA1 during which the gate of the first transistor T1 and the anode of the organic light emitting diode OLED are initialized, a threshold voltage compensation period PA2 during which the first transistor T1 is diode-connected, and a data writing period PA3 during which data signals are written in the pixels PX.

The pixels PX may be connected to the first power ELVDD, the second power ELVSS, and the initialization power VINT, with each having a fluctuating voltage level within one frame period. For example, the first power ELVDD may have one of a first voltage level ELVDD_L, a second voltage level ELVDD_M that is higher than the first voltage level ELVDD_L, and a third voltage level ELVDD_H that is higher than the second voltage level ELVDD_M. The initialization voltage VINT may have one of a fourth voltage level VINT_L, and a fifth voltage level VINT_H that is higher than the fourth voltage level VINT_L. The second power ELVSS may have one of a sixth voltage level ELVSS_L, and a seventh voltage level ELVSS_H that is higher than the sixth voltage level ELVSS_L.

權(quán)利要求

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