The common control signal GC has a gate on voltage level VGL during the initialization period PA1 and the threshold voltage compensation period PA2, and a gate off voltage level VGH during the data writing period PA3 and the light emission period PA4. In addition, a reference voltage VREF may be applied to a data line during a period other than the data writing period PA4, and a data signal may be supplied to a data line for expression of grays during the data writing period PA4.

As shown in FIG. 3, in the initialization period PA1, the first power ELVDD has the first voltage level ELVDD_L, the second power ELVSS has the seventh voltage level ELVSS_H, and the common control signal GC has the gate on voltage level VGL. The third transistor is turned on by the common control signal GC of the gate on voltage level VGL, and thus the anode and the second node N2 are connected.

The initialization power VINT has the fourth voltage level VINT_L before a time ta1 within the initialization period PA1. The second node N2 and the anode are connected to the first power ELVDD through the first transistor T1 turned on by the initialization power VINT, and thus the second node and the anode are initialized with a voltage acquired by applying a threshold voltage Vth of the first transistor T1 to the first voltage level ELVDD_L. At the start time of the initialization period PA1, the voltage V_N2 of the second node and the voltage of the anode of the organic light emitting diode OLED are initialized to a voltage (ELVDD_L+Vth) when the first power ELVDD is changed to the first voltage level ELVDD_L. That is, the voltage of the anode of the organic light emitting diode OLED can be initialized.