Before a time tb1 within an initialization period PB1, the initialization power VINT has a fourth voltage level VINT_L. Then, the second node N12 and the anode are connected to the first power ELVDD such that they are initialized with a voltage that is acquired by applying a threshold voltage of the first transistor T1 to the first voltage level ELVDD_L.

During a period tb1 to tb2 within the initialization period PB1, the initialization power VINT has a fifth voltage level VINT_H, and scan signals S[1] to S[n] have a gate-on voltage level VGL. Then, second transistors T12 of the pixels PX are turned on, and thus the first node N11 and the second node N12 are connected.

That is, the second node N12 and the anode are initialized to the first power ELVDD of the first voltage level ELVDD_L and then the first node N11 and the second node N12 are connected with each other during the period tb1 to tb2, and therefore a voltage of the first capacitor Cst remaining even after a light emission period of a previous frame period, is initialized.

During a period tb2 to tb3, the initialization power VINT has the fourth voltage level VINT_L, and the scan signals S[1] to S[n] have the gate-off voltage level VGH. The second node N12 and the first node N11 are connected back to the first power ELVDD through the first transistor T11, which has been turned on by the initialization power VINT, and thus the second node N12 and the anode are initialized to a voltage acquired by applying the threshold voltage of the first transistor T11 to the first voltage level ELVDD_L.