A data voltage according to a data signal written during a previous frame period remains in the first node N11 of each pixel even after light emission is terminated. According to the illustrated embodiment, for initialization of the first node N11, a first operation that connects the first node N11 and the second node N12 and a second operation that initializes the second node N12 and the anode to the first power ELVDD of the first voltage level ELVDD_L may be iteratively performed. In the timing diagram of FIG. 6, the first operation is performed three times and the second operation is performed three times, but the first node N11 may be initialized only by sequentially performing the first operation, the second operation, and the first operation. Alternatively, the first node N11 may be initialized by alternately iteratively performing the first operation and the second operation during the initialization period PB1.

During the threshold voltage compensation period PB2, the first power ELVDD has a third voltage level ELVDD_H, the initialization power VINT has a fifth voltage level VINT_H, and the second power ELVSS has a seventh voltage level ELVSS_H. Accordingly, the gate of the first transistor T11 and the second end of the first transistor T11 are connected by the turned-on second transistor T12 and the turned-on third transistor T13, and thus the first transistor T11 may be diode-connected.