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Display apparatus

專利號
US10867561B2
公開日期
2020-12-15
申請人
CANON KABUSHIKI KAISHA(JP Tokyo)
發(fā)明人
Yasuharu Ota; Yasushi Matsuno; Yu Maehashi; Hiromasa Tsuboi
IPC分類
G09G3/3291; G09G3/3266; G09G3/3233; H01L27/32
技術領域
signal,pixel,image,pixels,in,driving,voltage,row,line,emission
地域: Tokyo

摘要

A display apparatus in which selection circuits and display blocks are arranged is provided. Each of the display blocks include signal lines extending in a column direction, and pixels connected to the signal lines and arranged in a matrix in the column direction and in a row direction crossing the column direction. Each of the selection circuits selects a signal line in a predetermined order to supply an image signal among the signal lines such that the image signal is written in each of the pixels arranged in the row direction among the pixels. A time to select at least one signal line among the signal lines and supply the image signal is different from a time to select a signal line other than the at least one signal line among the signal lines and supply the image signal.

說明書

An arrangement for performing transmission to the signal line 124 that supplies an image signal as luminance information to each pixel 110 will be described next with reference to FIGS. 3A and 3B. In this embodiment, as shown in FIG. 3A, the signal lines 124 and the pixels 110 are divisionally controlled in a plurality of display blocks 126. Each of the plurality of display blocks 126 includes a plurality of signal lines 124 extending in the column direction, and a plurality of pixels 110 each connected to any one of the plurality of signal lines 124 and arranged in a matrix in the column direction and in the row direction crossing the column direction. An image signal is written in each pixel 110 via the signal line 124. In FIG. 3A, the direction in which the signal lines 124 extend will be referred to as the column direction, and the direction crossing the column direction will be referred to as the row direction. Additionally, a plurality of selection circuits 200 each configured to select the signal line 124 used to supply the image signal are arranged between the horizontal driving circuit 102 and the display blocks 126 in the display apparatus 100. The plurality of selection circuits 200 and the plurality of display blocks 126 are arranged such that one display block 126 corresponds to one selection circuit 200. As shown in FIG. 3B, the selection circuit 200 includes a switching unit 203 including a plurality of switches SW, a signal output buffer 201, and a signal generation unit 202.

權利要求

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