The signal voltage of the image signal generated by the signal generation unit 202 and supplied to the signal line 124 via the signal output buffer 201 and the switch SW is settled in a time according to a time constant derived from the parasitic resistance or parasitic capacitance of the signal line 124 and the like. For this reason, to settle the signal voltage to the desired voltage of the image signal after the switches SW1 to SW9 are turned on, the larger the voltage difference between the signal voltage before each switch SW is turned on and the desired signal voltage to be supplied is, the longer the needed setup time is.