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Display apparatus

專利號(hào)
US10867561B2
公開日期
2020-12-15
申請(qǐng)人
CANON KABUSHIKI KAISHA(JP Tokyo)
發(fā)明人
Yasuharu Ota; Yasushi Matsuno; Yu Maehashi; Hiromasa Tsuboi
IPC分類
G09G3/3291; G09G3/3266; G09G3/3233; H01L27/32
技術(shù)領(lǐng)域
signal,pixel,image,pixels,in,driving,voltage,row,line,emission
地域: Tokyo

摘要

A display apparatus in which selection circuits and display blocks are arranged is provided. Each of the display blocks include signal lines extending in a column direction, and pixels connected to the signal lines and arranged in a matrix in the column direction and in a row direction crossing the column direction. Each of the selection circuits selects a signal line in a predetermined order to supply an image signal among the signal lines such that the image signal is written in each of the pixels arranged in the row direction among the pixels. A time to select at least one signal line among the signal lines and supply the image signal is different from a time to select a signal line other than the at least one signal line among the signal lines and supply the image signal.

說明書

FIG. 9 is a driving timing chart of a modification of the driving method shown in FIG. 8 according to this embodiment. This driving method is different from the driving method shown in FIG. 8 in that the signal lines 124 to supply the image signals are selected in different orders among the plurality of signal lines 124 in the nth row and the (n+1)th row. In the driving method shown in FIG. 9, the selection circuit 200 selects the signal lines 124 to supply the image signals in reverse orders among the plurality of signal lines 124 in the nth row and the (n+1)th row to supply the image signals next to the nth row. That is, in the nth row, the image signals are supplied in order to the signal lines 124 connected to the pixels R1, R2, R3, B1, B2, B3, G1, G2, and G3. On the other hand, in the (n+1)th row, the image signals are supplied in order to the signal lines 124 connected to the pixels G3, G2, G1, B3, B2, B1, R3, R2, and R1. In this way, the selection circuit 200 selects the signal lines 124 to supply the image signals such that the emission color of the pixel in which the image signal is to be written finally in the nth row is the same as the emission color of the pixel in which the image signal is to be written first in the (n+1)th row. With this driving, the column to which the image signal is supplied finally in the nth row and the column to which the image signal is supplied first in the (n+1)th row include the pixels 110 of the same emission color which are adjacent in the row direction, and the difference of the signal voltage of the image signal when write-accessing the first column can be made smaller. In FIG. 9, the selection circuit 200 selects the signal lines 124 such that the image signals are supplied in reverse orders in the nth row and the (n+1)th row to supply the image signals next to the nth row. However, the present invention is not limited to this. For example, in the nth row, the image signals may be supplied in order to the signal lines 124 connected to the pixels R1, R2, R3, B1, B2, B3, G1, G2, and G3. On the other hand, in the (n+1)th row, the image signals may be supplied in order to the signal lines 124 connected to the pixels G1, G2, G3, B1, B2, B3, R1, R2, and R3.

權(quán)利要求

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