Liquid crystal device, liquid crystal device driving method, and electronic apparatus
摘要
說(shuō)明書(shū)
The vertical synchronizing signal (Vsync), the reference clock signal (DCLK), and the polarity signal are input into the control circuit 114. Based on these signals, the control circuit 114 generates control signals relating to switching control (couple/uncouple) of the first transistor 131, the second transistor 132, and the third transistor 133.
The vertical synchronizing signal (Vsync), the reference clock signal (DCLK), and the polarity signal are input into the driving circuit 115. Based on these signals, the driving circuit 115 generates a driving signal for each of the first transistor 131, the second transistor 132, and the third transistor 133. The driving signal is a signal relating to the driving method for the liquid crystal device 100 that will be described later, and is a signal that varies between a third potential and a fourth potential that is smaller than the third potential.
The driving signal generated by the driving circuit 115 is supplied through the first transistor 131, the second transistor 132, and the third transistor 133 to the first electrode 121, the second electrode 122, and the third electrode 123, respectively, of the peripheral electrode 120 in a state where phases are shifted from each other. In other words, the driving circuit 115 generates driving signals to be applied to each of the three electrodes 121, 122, and 123 configured for ion trapping, the driving signals having the same frequency, the driving signals being signals of which phases are shifted from each other.
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