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Liquid crystal device, liquid crystal device driving method, and electronic apparatus

專利號(hào)
US10867567B2
公開日期
2020-12-15
申請(qǐng)人
SEIKO EPSON CORPORATION（JP Tokyo）
發(fā)明人
Satoshi Yatabe; Naoki Tomikawa
IPC分類
G09G3/36; G02F1/1343
技術(shù)領(lǐng)域
potential,electrode,signal,driving,crystal,com,in,ac,liquid,polarity
地域： Tokyo

摘要

A liquid crystal device includes, peripheral electrodes including three electrodes for ion trapping, and a transistor coupled to each of the three electrodes. A common signal (COM signal) that varies between a first potential and a second potential in a first period is applied to a counter electrode. A driving signal that varies between a third potential and a fourth potential is input to the transistor. The driving signal is coupled to or uncoupled from the peripheral electrodes by the transistor in a unit of a duration equal to or less than ? of the first period. AC signals varying between a positive-polarity potential and a negative-polarity potential, with a potential of the common signal being a reference, in a second period longer than the first period, are applied to the three electrodes of the peripheral electrodes, in a state where phases of the AC signals are shifted mutually.

說明書

In FIG. 7, the first potential of the COM signal according to Example 1 is, for example, 5 V, and the second potential is, for example, 0 V. The frequency of the COM signal is, for example, 120 Hz. Thus, the first period in which the electric potential of the COM signal varies from the second potential to the first potential, varies from the first potential to the second potential, and varies to the first potential again is 8.4 ms (milliseconds), and one vertical duration when the electric potential of the COM signal is at the first potential or the second potential is approximately 4.2 ms (milliseconds).

C1 represents a control signal generated by the control circuit 114 and input into the gate of the first transistor 131. S1 represents a driving signal generated by the driving circuit 115 and input into the source of the first transistor 131. Similarly, C2 represents a control signal input into the gate of the second transistor 132, and S2 represents a driving signal input into the source of the second transistor 132. In addition, C3 represents a control signal input into the gate of the third transistor 133, and S3 represents a driving signal input into the source of the third transistor 133.

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