The controller 210 may include a random access memory (RAM) 281 used to store a signal or data input from outside of the image display apparatus (external to the image display apparatus) or used as a storage region corresponding to various operations performed by the image display apparatus, a read-only memory (ROM) 282 in which a control program for controlling the image display apparatus is stored, and a processor 283.

The processor 283 may include a GPU (not shown) for processing graphics corresponding to video. The processor 283 may be implemented by a system on chip (SoC) in which a core (not shown) and the GPU are integrated.

First to nth interfaces 285-1 to 285-n are connected to the various components described above, according to an exemplary embodiment. One of the first to nth interfaces 285-1 to 285-n may be a network interface connected to an external device via a network.

The RAM 281, the ROM 282, the processor 283, the graphic processor 284, and the first to nth interfaces 285-1 to 285-n may be connected to each other via an internal bus 286.

In an exemplary embodiment, the phrase “controller of an image display apparatus” may include the processor 283, the ROM 282, and the RAM 281.