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Data buffer and memory device having the same

專利號(hào)
US10867640B2
公開日期
2020-12-15
申請人
SK hynix Inc.(KR Gyeonggi-do)
發(fā)明人
Jin Ha Hwang
IPC分類
G11C16/26; G11C7/10; G11C7/06
技術(shù)領(lǐng)域
en_1,en_2,memory,node,data,may,voltage,transistor,pmos,d_out
地域: Gyeonggi-do

摘要

There are provided a data buffer and a memory system having the same. The data buffer includes first and second amplifiers configured to output output data by inverting input data, the first and second amplifiers having coupled output nodes to which the output data is output, wherein both of the first and second amplifiers are activated to output the output data when the input data has a first swing level, and wherein one of the first and second amplifiers is activated to output the output data when the input data has a second swing level narrower than the first swing level.

說明書

CROSS-REFERENCE TO RELATED APPLICATION

The present application claims priority under 35 U.S.C. § 119(a) to Korean patent application number 10-2018-0025366, filed on Mar. 2, 2018, the entire disclosure of which is incorporated herein by reference in its entirety.

BACKGROUND 1. Field of Invention

The present disclosure generally relates to a data buffer and a memory device having the same.

2. Description of Related Art

A memory device may store or output data. Generally, there are two types of memory devices: a volatile memory device in which stored data is extinguished when the power is shut off or interrupted, and a nonvolatile memory device in which stored data is retained even when power is shut off or interrupted. The memory device may include a memory cell array for storing data, a peripheral circuit for performing various operations such as program, read, and erase operations, and a control logic for controlling the peripheral circuit.

A memory controller may control data communication between a host and the memory device.

The memory device may communicate with the memory controller through a channel. For example, a data buffer in the peripheral circuit in the memory device may transmit and receive data between the memory controller and the memory device through the channel.

SUMMARY

Embodiments provide a data buffer capable of selectively transmitting data having various swing levels in various modes and a memory device having the data buffer.

權(quán)利要求

1
What is claimed is:1. A data buffer comprising:a first amplifier and a second amplifier configured to output an output data signal in response to a first enable signal or a second enable signal determined by an input data signal,wherein the first amplifier and the second amplifier have coupled output nodes to which the output data signal is output,wherein the first amplifier and the second amplifier are activated to output the output data signal in response to the first enable signal or the second enable signal determined by the input data signal having a first swing level or a second swing level,wherein the second swing level is narrower than the first swing level, andwherein the first amplifier and the second amplifier are connected in parallel.2. The data buffer of claim 1, wherein, in response to the input data signal having the first swing level, the first amplifier and the second amplifier simultaneously output the output data signal obtained by inverting the input data signal.3. The data buffer of claim 2, wherein the first amplifier and the second amplifier:output the output data signal that is of a low level if the input data signal is of a high level; andoutput the output data signal that is of a high level if the input data signal is of a low level.4. The data buffer of claim 1, wherein, in response to the input data signal having the second swing level, according to the input data signal,the first amplifier operates as a pull-down driver and the second amplifier operates as a pull-up driver.5. The data buffer of claim 4, wherein the first amplifier outputs the output data signal that is of a low level through the output node if the input data signal is of a high level, andthe second amplifier outputs the output data signal that is of a high level through the output node if the input data signal is of a low level.
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