The second amplifier 1130 may include fourth to eighth PMOS transistors P4 to P8 and sixth to ninth NMOS transistor N6 to N9, which are coupled between a seventh node D7 to which the first voltage Vp1 is applied and an eleventh node D11 that is a ground terminal.

The fourth and sixth PMOS transistors P4 and P6 may be coupled in series to each other between the seventh node D7 and an eighth node D8. For example, the fourth PMOS transistor P4 may couple the seventh node D7 and the sixth PMOS transistor P6 to each other according to the second enable signal EN_2. The sixth PMOS transistor P6 may couple the fourth PMOS transistor P4 and the eighth node D8 to each other according to a voltage of a ninth node D9. The fifth PMOS transistor P5 may couple the seventh node D7 and the eighth node D8 to each other according to the first enable signal EN_1. The seventh PMOS transistor P7 may couple the eighth node D8 and the ninth node D9 to each other according to the first internal voltage INBP. The eighth PMOS transistor P8 may couple the eighth node D8 and an output node D_OUT.