In the first amplifier 1120, the first PMOS transistor P1 may be turned off according to the first enable signal EN_1 that is high. The fourth node D4 may be initially reset to low. Therefore, the second and third PMOS transistors P2 and P3 may be turned on. If the second and third PMOS transistors P2 and P3 are turned on, the third node D3, the fourth node D4, and the output node D_OUT may be coupled to each other. The first voltage Vp1 that is a positive voltage is supplied to the third node D3, and therefore, the positive voltage may also be applied to the fourth node D4 and the output node D_OUT. When the voltage of the fourth node D4 is increased, the third NMOS transistor N3 may be turned on. The fourth NMOS transistor N4 is turned on by the first enable signal EN_1 that is high, and the fifth NMOS transistor N5 is turned off by the second enable signal EN_2 that is low. Therefore, the fifth node D5 may be coupled to the sixth node D6 coupled to the ground terminal. In addition, the second internal voltage INBN having the second voltage Vp2 that is a positive voltage is applied to the first NMOS transistor N1, and therefore, a current path passing through the fourth to sixth nodes D4 to D6 may be formed.