An ALE pad is a pad to which an address latch enable signal is applied, and may be used to control loading of an address into the memory device 2110. For example, when a high address latch enable signal is applied to the ALE pad, an address may be loaded into the memory device 2110.

A CLE pad is a pad to which a command latch enable signal is applied, and may be used when a command is loaded into the memory device 2110. For example, when a high command latch enable signal is applied to the CLE pad in a wake-up operation, the memory controller 2120 may transmit a status check command to the memory device 2110.

A WP #pad is a terminal to which a write protect signal is applied, and may be used to protect the memory device when a program operation or erase operation is accidentally performed.

The IO pad may be used to transmit a command, an address, and data. For example, eight IO pads IO<1:8> may be included in the memory device 2110.

An R/B #pad may be a pad to which a status signal output from the memory device 2110 is transmitted in response to the status check command. The R/B #pad may be omitted, in which case the IO pad may be used as the R/B #pad.

FIG. 8 is a diagram illustrating a memory device according to an embodiment of the present disclosure, for example, the memory device 2110 of FIG. 7.