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Data buffer and memory device having the same

專(zhuān)利號(hào)
US10867640B2
公開(kāi)日期
2020-12-15
申請(qǐng)人
SK hynix Inc.(KR Gyeonggi-do)
發(fā)明人
Jin Ha Hwang
IPC分類(lèi)
G11C16/26; G11C7/10; G11C7/06
技術(shù)領(lǐng)域
en_1,en_2,memory,node,data,may,voltage,transistor,pmos,d_out
地域: Gyeonggi-do

摘要

There are provided a data buffer and a memory system having the same. The data buffer includes first and second amplifiers configured to output output data by inverting input data, the first and second amplifiers having coupled output nodes to which the output data is output, wherein both of the first and second amplifiers are activated to output the output data when the input data has a first swing level, and wherein one of the first and second amplifiers is activated to output the output data when the input data has a second swing level narrower than the first swing level.

說(shuō)明書(shū)

In the drawing figures, dimensions may be exaggerated to more clearly illustrate certain features or relationships. It will be understood that when an element is referred to as being “between” two elements, it can be the only element between the two elements, or one or more intervening elements may also be present. Like reference numerals refer to like elements throughout. Also, throughout the specification, reference to “an embodiment” or the like is not necessarily to only one embodiment, and different references to “an embodiment” are not necessarily to the same embodiment(s).

FIG. 1 is a diagram illustrating a data buffer according to an embodiment of the present disclosure.

FIG. 2 is a diagram illustrating data modes in which swing levels of data are different from each other, according to an embodiment of the present disclosure.

FIG. 3 is a circuit diagram illustrating a data transmission circuit according to an embodiment of the present disclosure.

FIG. 4 is a diagram illustrating a driving method of a data transmission circuit in a first mode according to an embodiment of the present disclosure.

FIG. 5 is a diagram illustrating a driving method of a data transmission circuit in a second mode according to an embodiment of the present disclosure.

FIG. 6 is a diagram illustrating a memory system including a data buffer according to an embodiment of the present disclosure.

FIG. 7 is a diagram illustrating pads of a memory device according to an embodiment of the present disclosure.

權(quán)利要求

1
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