An example of a memory device 100, for example, a printed memory (i.e., printed memory device) 100 such as a XPM 100 is depicted in the plane view of FIG. 1. The structure and function of the XPM 100 is known and is only briefly discussed herein. The FIG. 1 printed memory 100 includes a substrate 102, for example, a flexible dielectric substrate 102, such as a flexible polymer substrate, that may include an adhesive backing layer to aid in attachment of the printed memory 100 to a surface of a product, a plurality of wiring lines (e.g., WLs and BLs) 104 and a ferroelectric layer 106 directly interposed or positioned between the WLs and the BLs. A memory cell that stores the logic bit or logic state is provided by and within the ferroelectric layer 106 at the physical location that is interposed between the intersection of each WL and BL. It will thus be appreciated that the WLs and BLs do not physically contact each other, but are physically separated by the ferroelectric layer 106. The printed memory 100 depicted in FIG. 1 includes ten wiring lines 104 (five WLs and five BLs), and thus the FIG. 1 device includes 25 memory cells and may thus store 25 bits of information. Each wiring line 104 terminates in a contact pad 108. Each memory cell can be individually addressed through two of the contact pads (i.e., through one WL and one BL). The plurality of contact pads 108 may be arranged in a rectangular shape in two or more rows and columns as depicted, or they may be arranged in a single column. It will be appreciated that a XPM may include other structures that are not described or depicted for simplicity, while various depicted structures may be removed or modified. Each memory cell of the printed memory 100 may be read by applying a suitable read voltage to two of the wiring lines 104 (i.e., to one word line and one bit line) and measuring an electrical response. To apply the read voltage, the plurality of contact pads 108 can be physically and/or electrically contacted with probe contacts of a reader. A voltage is applied across the contact pads 108 through probe contacts, and the resulting response is measured. Each memory cell may be individually addressed during a read cycle or write cycle (hereinafter, a memory operation), and one or more of the memory cells in the memory array may be read or written simultaneously or serially.