The antifuse element AF is an element which is insulated in an initial state and, when subjected to dielectric breakdown by a connect operation, makes a transition to a conductive state. The conductive state of the antifuse element AF is detected by the load circuit 71. If it is in an insulated state, the output of the load circuit 71 becomes the high level. If it is in a conductive state, the output of the load circuit 71 becomes the low level. The output of the load circuit 71 is input to the comparison circuit 72 and is compared with the logic level of the corresponding bit of the row address RADD2. If both of them match with each other, the comparison circuit 72 causes an output signal C1 to Cn to be the high level. Reversely, if both of them do not match with each other, the comparison circuit 72 causes the output signal C to Cn to be the low level.

The enable circuit ENC includes the antifuse element AF, a load circuit 71, and an inverter circuit 73. The enable circuit ENC is a circuit which indicates whether the fuse set FSETk is used or not. If used, the antifuse element AF of the enable circuit ENC is connected. As a result, if fuse set FSETk is used, an enable signal AFENk output from the enable circuit ENC becomes the high level.

The output signals C1 to Cn of the antifuse circuits AFC1 to AFCn and the enable signal AFENk are input to an AND gate circuit 74, which is a comparison unit. As a result, on the condition that the enable signal AFENk is activated to the high level, the hit signal HITk is activated when the bits X1 to Xn of the input row address RADD2 and the defective address stored in the fuse set FSETk completely match with each other.