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Apparatus and methods for controlling refresh operations

專利號
US10867660B2
公開日期
2020-12-15
申請人
MICRON TECHNOLOGY, INC.(US ID Boise)
發(fā)明人
Hiroshi Akamatsu
IPC分類
G11C7/00; G11C11/408; G11C5/04; G11C5/06; G11C29/18; G11C29/00; G11C8/12
技術(shù)領(lǐng)域
word,row,address,rwlj,radd2,redundant,refresh,circuit,signal,target
地域: ID ID Boise

摘要

An apparatus includes a first word line, a second word line and a control. The second word line is contiguous to the first word line. The control circuit includes a first defective address storing circuit and a first detection circuit. The first defective address storing circuit stores first enable information along with first defective address. The first enable information indicates whether or not the second word line is functional. The first detection circuit provides a first signal when the first word line is accessed. The first signal indicates whether or not the second word line is functional. The control circuit activates the second word line when the first signal indicates that the second word line is functional and does not activate the second word line when the first signal indicates that the second word line is not functional.

說明書

Since the state signals TRRST2 and TRRST3 are at the low level at this point of time, the selector 31 shown in FIG. 3 selects the row address RADD1 (target address) input from outside and outputs this as the row address RADD2. The row address RADD2 is input to the address detection circuit 35, and, since the target address is a defective address in the present case, the hit signal HITk is activated. As a result, the row predecoder 41 and the row decoder 42 select the redundant word line RWLj based on the hit signal HITk and the least significant bit X0 of the target address. Then, when a precharge command is issued, the state signal TRRST2 and the selection signal SEL2 are changed to the high level (time t53).

The first target-row refresh operation is completed as described above. In this manner, in the first target-row refresh operation, the redundant word line RWLj, which is a replacement destination, is selected. The redundant word line RWLj, which is the replacement destination, is, for example, the redundant word line RWL2.

Herein, the hit signal HITk is any of the hit signals HIT1 to HITm. Therefore, it is not the hit signal HIT0. For example, if the redundant word line RWLj is the redundant word line RWL2, the hit signal HIT1 is activated. In this case, the least significant bit X0 of the target address is “0”.

權(quán)利要求

1
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