The active signal iACT is activated when the internal command/address signal iC/A is indicating an active command. When the active signal iACT is activated, a row address contained in the internal command/address signal iC/A is latched by the address latch circuit 26. The row address RADD1 latched by the address latch circuit 26 is supplied to a row control circuit 28. Based on the row address RADD1, the row control circuit 28 selectively activates any of a plurality of normal word lines WL and a plurality of redundant word lines RWS contained in the memory cell array 20.