FIG. 3A illustrates an exemplary embodiment of a main word line driver 300. The MWD 300 can include a transistor 302 of a first type, such as, for example, a PMOS transistor, having a source coupled to a signal ARMW. The voltage of signal ARMW and its complement ARMWF can correspond to a decoded address signal such as, for example, the first portion of a decoded row address. For example, the decoded row address ARMW (ARMWF) can correspond to one or more MWDs of a memory bank MB. The drain of the transistor 302 can be connected to a drain of transistor 304 that can be different from the first type, such as, for example a NMOS transistor. The interconnected drains of the transistors 302, 304 are coupled to a global word line GR. The source of transistor 304 can be connected to a voltage source that can be, for example, in a range of ?0.25 volts to 0 volts. For example, as seen in FIG. 3A, the voltage source is at Vnwl. However, in other embodiments, the voltage source can be at Vss or at some other low voltage value. The gate of the transistor 304 can be connected to the ARMWF signal. The gate of the transistor 302 is driven by the RFF signal. The RFF and RF signals can correspond to a portion of a decoded row address that can relate to, for example, one or more MWDs of a memory bank MB.
