In addition, with a low RFX_n signal, the output of AND gate circuit 314 is low and NMOS transistor 322 is OFF, which isolates voltage Voff (used in row hammer stress mitigation) from node 321 even though the NMOS transistor 326 is ON due to the high RFF signal. Similarly, the PMOS transistor 320 is OFF to isolate the voltage V1 from the node 321. The PMOS transistor 320 is OFF because the source voltage V1, in some embodiments, is set to be lower than the high voltage value of the RFF signal. For example, if the high voltage value of the RFF is at Vccp, then the voltage V1 can be Vccp-Vt, where Vt is the threshold voltage of the transistor 320 (e.g., if Vccp=3.2 volts and Vt is 0.7 volts, then V1 is 2.5 volts). The voltage V1 can be set to be below the high voltage value of the RFF signal by at least the threshold voltage of the transistor 320 in order to prevent unreliable operation of the transistor 320.