The transistor 622, which can be a PMOS transistor, can have a drain connected to the source of transistor 624, which can be a PMOS transistor. The source of transistor 622 can be connected to a voltage source such as, for example, Vccp2. In some embodiments, as discussed above, the value of Vccp2 can be higher than the active word line voltage, which can be, for example, Vccp (or, e.g., Vcc or another high voltage source). The drain of transistor 624 can be connected to the drain of transistor 626, which can be a NMOS transistor. As seen in FIG. 6, the interconnected drains of transistors 624 and 626 are coupled to the PH signal line. The source of transistor 626 is coupled to the drain of transistor 628, which can be a NMOS transistor. The source of transistor 628 can be coupled to the drain of transistor 630, which can be a NMOS transistor. The source of transistor 630 is coupled to a voltage source, such as, for example, Vnwl (or, e.g., Vss or another low voltage source). In addition, transistor 632, which can be, for example, a NMOS transistor, is disposed in parallel with transistor 630. Thus, the source of transistor 632 can be connected to the same voltage source as that of transistor 630, such as, for example, Vnwl (or, e.g., Vss or another low voltage source), and the drain of transistor 32 can be connected to the source of transistor 628. The circuit 620 can also include a level shifter 640 that receives the PHF signal from circuit 610. In some embodiments, the level shifter 640 shifts the high voltage level of the PHF signal. For example, if the PHF signal from circuit 610 is at Vccp, which can be, for example, 3.2 volts, the level shifter 640 outputs a gate drive signal 642 that is higher in value such as, for example, Vccp2.