Main word line driver circuit
摘要
說明書
At block 710, the processing device (e.g., processor 116 and/or another processor) generates a first phase signal and a second phase signal in a memory device. In some embodiments, as discussed above, the first phase signal can be the PH phase signal and the second phase signal can be the PHF phase signal which are generated by a FX phase driver circuit (e.g., FXD 600). At block 720, the processing device (e.g., processor 116 and/or another processor) drives a local word line of the memory device to follow a global word line signal by setting the first phase signal at a first value prior to the global word line signal entering an active state. For example, the local word line can be local word line WL (e.g., WL0 to WLn) that is generated by a SWD and the global word line can be global word line GR (e.g., GR0 to GRn) that is generated by a MWD. A transistor in a SWD (e.g., transistor 512 in SWD 510) can be turned ON so that the local word line WL (e.g., WL0) follows the global word line GR (e.g., GR0), as discussed above. As seen in
