The SSD controller 1210 may control the flash memories 1221 to 122m in response to the signal SIG from the host 1100. In an exemplary embodiment, the SSD controller 1210 may perform the reliability verification read operation on the flash memories 1221 to 122m based on configurations described with reference to FIGS. 1 to 9. The SSD controller 1210 may perform the read reclaim operation of the flash memories 1221 to 122m based on the result of the reliability verification read operation.

The auxiliary power supply 1230 is connected to the host 1100 via the power connector 1002. The auxiliary power supply 1230 may receive the electric power PWR from the host 1100 and may be charged by the electric power. When the electric power PWR is not smoothly supplied from the host 1100, the auxiliary power supply 1230 may power the SSD system 1000. The auxiliary power supply 1230 may be placed inside or outside the SSD 1200. For example, the auxiliary power supply 1230 may be placed on a main board to supply auxiliary electric power to the SSD 1200.

The buffer memory 1240 operates as a buffer memory of the SSD 1200. For example, the buffer memory 1240 may temporarily store data received from the host 1100 or from the flash memories 1221 to 122m or may temporarily store metadata (e.g., a mapping table) of the flash memories 1221 to 122m. The buffer memory 1240 may include volatile memories such as a DRAM, a synchronous DRAM (SDRAM), a double data rate (DDR) SDRAM, a low power DDR (LPDDR) SDRAM, and a static RAM (SRAM) or nonvolatile memories such as a FRAM a ReRAM, and a PRAM.