The memory interface 370 may be configured to communicate with the nonvolatile memory device 110/120 under control of the processor 320. As described with reference to 
In an exemplary embodiment, in the case where the storage device 100/200 does not include the RAM 130/230, the controller 300 may not include the buffer control circuit 360.
In an exemplary embodiment, the processor 320 may control the controller 300 by using codes. The processor 320 may load codes from a nonvolatile memory device (e.g., a read only memory) that is implemented in the interior of the controller 300. As another example, the processor 320 may load codes from the nonvolatile memory device 110/120 through the memory interface 370.